Experiment No : 7 Study of Synchronous Counter

    

AIM:  Study of Synchronous Counter

1. Design and Implement 4-bit Up/down Counter and MOD-N Up/down Counter using IC74HC191/ IC74HC193. Draw Timing Diagram.

    

Pre-Test

Procedure  

Breadboard Implementation

 

Simulation using virtual lab 

Link 1

Link 2

Post-Test

References

Experiment no 6 Study of Counter ICs (74LS90/74LS93).

 AIM:  Study of Counter ICs (74LS90/74LS93).

Design and Implement MOD-N and MOD-NN using IC-74LS90 and draw Timing diagram 
    

Pre-Test

Procedure  

Breadboard Implementation

 

Simulation using virtual lab 

Link 1 

Link 2 

Post-Test

References

Expt. No. 1. Study of IC-74LS153 as a Multiplexer.

   AIM: Study of IC-74153 as a Multiplexer

1. Design and Implement 8:1 MUX using IC-74LS153 & Verify its Truth Table.
2. Design & Implement the given 4 variable function using IC74LS153 & Verify its truth- table.

    LEARNING OBJECTIVES:

1.      Design and verify multiplexer tree i.e. 8:1 MUX using 4:1MUX.

2.      Reduce given 4 variable function using folding technique and implement using multiplexer tree designed.

THEORY:    

 Multiplexer

A multiplexer is a combinational digital logic switching device that has multiple inputs and one output. In addition to the input and output lines, the multiplexer has data select lines through which the data passed from an input line to the output line is determined. Figure 1 shows 4:1 multiplexer.

Figure1: 4:1 Multiplexer.

 Based on the number of input data lines, we can determine the number of the select data lines since it is always a power of 2. For example if we have 4 input lines we will need 2 data select lines to control it since 2² = 4. Similarly, if we have 16 input lines we will need 4 data select lines since 2⁴ = 16, and so on.

Pre-Test

Procedure  

Breadboard Implementation

 

Simulation using virtual lab Part1

Simulation using virtual lab Part2

Post-Test

References

Experiment no 4 : Study of IC-74LS85 as a magnitude comparator

   

AIM:  Study of IC-74LS85 as a magnitude comparator

1. Design and Implement 4-bit Comparator.
2.  Design and Implement 8-bit Comparator.

    

Pre-Test

Procedure  

Breadboard Implementation

 

Simulation using virtual lab 

Post-Test

References